The concept of 3D memory stacking has been all talk and no silicon, but the silicon is getting much closer. Both Toshiba and the Micron/Intel alliance are preparing to sample densely-stacked 3D memory chips in the next 12 months.
3D stacking means just that. Traditionally, silicon chips are one plane; everything is flat, a 2D design. If you want to make a denser chip, you have to make it bigger because everything needs to be spread out. In a 3D memory design, the cells and interconnects are stacked up like Legos.
What's really nice about 3D stacking is that the memory makers don't need to go to bleeding edge process technology. Instead of shrinking size of each cell to make it thinner, 3D lets the manufacturers pile more memory on in the same physical space. It may be 48 layers but when you are at 20 nanometers, it's not like your memory chips will look like a Xeon processor. 3D means stacking up, not out, so you have the same chip size, just a slight thicker.
Toshiba, in partnership with SanDisk, just announced it has finished development of vertically-stacked 3D NAND memory devices. The memory is called BiCS NAND flash memory, for bit cost scalable, and will go into mass-production in 2016.
At the same time, Intel and Micron have announced they are now manufacturing their own 32-layer NAND chips for SSDs due in about a year. Even as they produce 32GB chips, they have 48GB chips available for sampling. The current 32-level flash chips use multilevel cell (MLC) for 256Gbit capacity and triple-level cell (TLC) die for 384Gbit capacity.
Micron said the chips could be used to make a M.2 PCIe SSDs up to 3.5TB in capacity and the size of a stick of gum in size, or it could make a 2.5-inch SSDs with 10TB of capacity. The one thing neither company has revealed is the price. At the going rate of 50 cents per gigabyte, that's still a $5,000 drive. Hopefully this increased capacity also means a decreased price because at $5,000, I'll live with the 7200 rpm drive.
